This invention relates to a pulse width modulation circuit using a triangular wave generation circuit and to an integration circuit using the pulse width modulation circuit. More particularly, the present invention relates to an integration circuit which is particularly suitable for generating pulses in such a number as to be proportional to the integration of the product of two signals, and also to a pulse width modulation circuit using the former.
FIG. 1 illustrates a two-phase electronic type energy meter produced by modifying a three-phase electric energy meter disclosed on page 257 of INT. J. Electronics, 1980, Vol. 48, No. 3.
A triangular wave generation circuit 10 consists of an integrator INT1 which selectively receives d.c. voltages V.sub.B and -V.sub.B via a switch SW1, a flip-flop FF1 generating a signal S.DELTA. which controls the switch SW1 and first and second comparators CP1 and CP2 which control set and reset operations of the flip-flop, respectively. The integrator INT1 consists of a resistor R1, a capacitance C1 and an amplifier A1. The comparators CP1 and CP2 compare the output of the amplifier A1 with the reference voltages V.sub.R and -V.sub.R and generate signals for setting and resetting the flip-flop FF1 when they are in agreement, respectively. The switch SW1 changes over the voltage to V.sub.B and -V.sub.B when the signal S.DELTA. is 0 and 1, respectively, and applies the voltage to the integrator INT1. Thus, the output signal V.DELTA. from the circuit 10 becomes a triangular wave having an inclination of V.sub.B /(R.sub.1 C.sub.1) in both positive and negative portions and a peak of .+-.V.sub.R. This output signal V.DELTA. is applied to the non-inversion input terminal of the comparator CP3, and a first a.c. signal E.sub.V or its inversion signal -E.sub.V is applied as an input voltage V.sub.x to the inversion input terminal of the comparator CP3. The switch SW3 selects the signals -E.sub.V and E.sub.V when the later-appearing signal S.sub.V is 1 and 0, respectively.
The output V.sub.g of the comparator CP3 becomes "1" and "0" when the level difference between the triangular wave V.DELTA. and the input voltage V.sub.x is positive and negative, respectively. Thus, the output signal V.sub.g becomes a signal formed by modulating the pulse width of the input signal V.sub.x.
Here, the degree of pulse modulation D is defined in the following manner: EQU D=a/(a+b) (1)
where a is the time in which V.sub.g is "1" during one cycle of V.sub.g (that is, one cycle of the triangular wave V.DELTA.), and b is the time in which V.sub.g is "0".
On the other hand, the comparator CP3 generates V.sub.g ="0" and V.sub.g ="1" when V.sub.x &gt;V.DELTA. and when V.sub.x &lt;V.DELTA., respectively. Accordingly, the following equations are given with T representing one cycle of the triangular wave: EQU a=1/2(1-(V.sub.x /V.sub.R)T (2) EQU a+b=T (3)
Accordingly, the degree of pulse modulation D can be expressed as follows: EQU D=1/2(1-V.sub.x /V.sub.R) (4)
Here, it is assumed that the frequency of the triangular wave is selected to be sufficiently higher than the frequency of the signal S.sub.v and that of the signal E.sub.v.
The signal V.sub.g modulated in this manner controls the selector switch SW2 for the second a.c. current E.sub.i proportional to a current applied to an electric system and its inversion signal -E.sub.i so that the switch SW2 selects the signals E.sub.i and -E.sub.i when the signal V.sub.g is 1 and 0, respectively.
The mean value V.sub.M of the output V.sub.M of the switch SW2 over one cycle of the triangular wave is given as fiollow: EQU V.sub.M =E.sub.i .times.D+(-E.sub.i).times.(1-D)=-(V.sub.x E.sub.i)/V.sub.R ( 5)
In other words; ##EQU1##
Thus, the mean value of V.sub.M with respect to time is proportional to the product of the first input V.sub.x and the second input E.sub.i.
The selection output V.sub.M of the switch SW2 is applied to the integrator INT2 inside the pulse generation circuit 20. The integrator INT2 consists of a resistor R2, a capacitance C2 and an amplifier A2, and produces an integration signal V.sub.P of the input V.sub.M from the output terminal of the amplifier A2. Comparators CP4 and CP5 compare the integration signal V.sub.p with the reference voltages V.sub.R and -V.sub.R, respectively, and set and reset the flip-flop EF2 when they are in agreement, respectively.
Change-over of the signals E.sub.v and -E.sub.v by S.sub.v prevents the saturation of the integration signal V.sub.p by inverting the polarity of the input V.sub.M to the integrator INT2, and lets V.sub.p change repeatedly between the voltages V.sub.p and -V.sub.p at a frequency proportional to the integration value of the product of E.sub.v and E.sub.i.
The integration value of the product of the voltage E.sub.v and the current E.sub.i, that is, the electric power, can be measured by counting how many times the output S.sub.v of the flip-flop FF2 becomes 1.
It will be now considered that the amplifier A.sub.1 and the comparators CP1 through CP3 have an offset. FIG. 2 is a circuit diagram showing the case in which these offset voltages are inserted as equivalent voltage sources. Here, the voltage sources V.sub.fA, V.sub.f1 -V.sub.f3 are those which equivalently express the offset quantities of the amplifier A1 and comparators CP1 through CP3, respectively. Accordingly, the amplifier A1 and the comparators CP1-CP3 in FIG. 2 can be regarded as having no offset. The triangular wave V.DELTA. in this case has a waveform expressed by the following relation: ##EQU2## EQU turn-back voltage on positive side=V.sub.R -V.sub.f1 EQU turn-back voltage on negative side=-(V.sub.R -V.sub.f2)
As can be understood clearly from above, the mean voltage of this triangular wave V.DELTA. becomes 1/2(V.sub.f2 -V.sub.f1) and is not zero when the offset V.sub.f1 is not equal to the offset V.sub.f2. Hereinafter, this mean voltage will be referred to as the "offset of the triangular wave". In this example, this offset results from the difference of the offset between the comparators CP1 and CP2.
Because the offset voltage V.sub.f3 of the comparator CP3 exists, this triangular wave voltage V.DELTA. appears as if it were shifted to a voltage V.DELTA.'. The waveform of this voltage V.DELTA.' has a value which is the sum of V.sub.f3 to the positive and negative turn-back voltages of the waveform of V.DELTA., respectively. The sum is more clearly illustrated in FIG. 3. In the same way as the formulas (1) through (3), the degree of pulse width modulation D of the modulation signal V.sub.g is given by the following formula: ##EQU3## In the formula (6) above, the denominator of the second item is equivalent to the change of the reference voltage V.sub.R because of the existence of the offset voltages of the comparators CP1 and CP2. The influence resulting from the change of V.sub.R can be compensated for by another means such as trimming of the V.sub.R generator; hence, the influence is not hereby dealt with.
If the following relation is given in the formula (6), EQU V.sub.R '=V.sub.R -1/2(V.sub.f1 +V.sub.f2) EQU V.sub.f =-1/2(V.sub.f2 -V.sub.f1)-V.sub.f3
then, D is given as follows: ##EQU4## V.sub.f is the sum of the offset of the triangular wave and the offset of the comparator CP3 but with a different polarity. Accordingly, this is referred to as an "overall offset". If such an overall offset voltage exists, the mean value V.sub.M of V.sub.M in one cycle of the triangular wave, that corresponds to the formula (5), is given by the following formula: ##EQU5## Accordingly, the frequency f.sub.o of the pulse S.sub.v becomes f.sub.o .varies.(V.sub.x +V.sub.f)xE.sub.i, and the overall offset voltage V.sub.f occurs as an error. This error depends upon the product of the overall offset V.sub.f and E.sub.i and hence, it is almost impossible to compensate for the error after detection of the pulse S.sub.v. It is therefore necessary to cancel in advance the overall offset inside the pulse width modulation circuit.
Thus, it has been necessary conventionally either to select the comparators CP1 through CP3 having offset voltages which are as small as possible, or to add an offset adjusting circuit. This results eventually in the increase of the cost of production of the circuit.